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SST39VF1601C-70-4C-MAKE(2010) データシートの表示(PDF) - Silicon Storage Technology

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SST39VF1601C-70-4C-MAKE
(Rev.:2010)
SST
Silicon Storage Technology 
SST39VF1601C-70-4C-MAKE Datasheet PDF : 33 Pages
First Prev 31 32 33
16 Mbit Multi-Purpose Flash Plus
SST39VF1601C / SST39VF1602C
PACKAGING DIAGRAMS
Pin # 1 Identifier
12.20
11.80
Data Sheet
1.05
0.95
0.50
BSC
0.27
0.17
18.50
18.30
0.15
0.05
0.70
0.50
20.20
19.80
1.20
max.
Note: 1. Complies with JEDEC publication 95 MO-142 DD dimensions,
although some dimensions may be more stringent.
2. All linear dimensions are in millimeters (max/min).
3. Coplanarity: 0.1 mm
4. Maximum allowable mold flash is 0.15 mm at the package ends, and 0.25 mm between leads.
FIGURE 27: 48-lead Thin Small Outline Package (TSOP) 12mm x 20mm
SST Package Code: EK
DETAIL
0°- 5°
0.70
0.50
1mm
48-tsop-EK-8
©2010 Silicon Storage Technology, Inc.
31
S71380-04-000
05/10

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