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ST7FDALI データシートの表示(PDF) - STMicroelectronics

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ST7FDALI Datasheet PDF : 141 Pages
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ST7DALI
Figure 37. Block Diagram of Break Function
BREAK pin (Active Low)
BREAKCR Register
BA BPEN PWM3 PWM2 PWM1 PWM0
PWM0
PWM1
PWM2
PWM3
(Inverters)
Note:
The BREAK pin value is latched by the BA bit.
1
PWM0
PWM1
PWM2
PWM3
0
When BA is set:
PWM counter -> Reset value
ARR & DCRx -> Reset value
PWM Mode -> Reset value
11.2.3.1 Input Capture
The 12-bit ATICR register is used to latch the val-
ue of the 12-bit free running upcounter after a ris-
ing or falling edge is detected on the ATIC pin.
When an input capture occurs, the ICF bit is set
and the ATICR register contains the value of the
Figure 38. Input Capture Timing Diagram
free running upcounter. An IC interrupt is generat-
ed if the ICIE bit is set. The ICF bit is reset by read-
ing the ATICR register when the ICF bit is set. The
ATICR is a read only register and always contains
the free running upcounter value which corre-
sponds to the most recent input capture. Any fur-
ther input capture is inhibited while the ICF bit is
set.
fCOUNTER
COUNTER 01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
ATIC PIN
ICF FLAG
ICR REGISTER
xxh
INTERRUPT
ATICR READ
INTERRUPT
04h
09h
t
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