PIC32MX250F128C-I/SO データシートの表示（PDF） - Microchip Technology

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PIC32MX250F128C-I/SO

32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

Microchip Technology 

PIC32MX1XX/2XX

REGISTER 16-3: SPIxSTAT: SPI STATUS REGISTER

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1

31:24

23:16

15:8

7:0

U-0

—

U-0

—

U-0

—

R-0

SRMT

U-0

—

U-0

—

U-0

—

R/W-0

SPIROV

U-0

—

U-0

—

U-0

—

R-0

SPIRBE

R-0

R-0

R/C-0, HS

FRMERR

U-0

—

R-0

R-0

R-0

RXBUFELM<4:0>

R-0

R-0

R-0

TXBUFELM<4:0>

R-0

U-0

U-0

SPIBUSY

—

—

R-1

U-0

R-0

SPITBE

—

SPITBF

Bit

24/16/8/0

R-0

R-0

R-0

SPITUR

R-0

SPIRBF

Legend:

R = Readable bit

-n = Value at POR

C = Clearable bit

W = Writable bit

‘1’ = Bit is set

HS = Set in hardware

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 31-29 Unimplemented: Read as ‘0’

bit 28-24 RXBUFELM<4:0>: Receive Buffer Element Count bits (valid only when ENHBUF = 1)

bit 23-21 Unimplemented: Read as ‘0’

bit 20-16 TXBUFELM<4:0>: Transmit Buffer Element Count bits (valid only when ENHBUF = 1)

bit 15-13 Unimplemented: Read as ‘0’

bit 12 FRMERR: SPI Frame Error status bit

1 = Frame error detected

0 = No Frame error detected

This bit is only valid when FRMEN = 1.

bit 11 SPIBUSY: SPI Activity Status bit

1 = SPI peripheral is currently busy with some transactions

0 = SPI peripheral is currently idle

bit 10-9 Unimplemented: Read as ‘0’

bit 8

SPITUR: Transmit Under Run bit

1 = Transmit buffer has encountered an underrun condition

0 = Transmit buffer has no underrun condition

This bit is only valid in Framed Sync mode; the underrun condition must be cleared by disabling/re-enabling

the module.

bit 7

SRMT: Shift Register Empty bit (valid only when ENHBUF = 1)

1 = When SPI module shift register is empty

0 = When SPI module shift register is not empty

bit 6

SPIROV: Receive Overflow Flag bit

1 = A new data is completely received and discarded. The user software has not read the previous data in

the SPIxBUF register.

0 = No overflow has occurred

This bit is set in hardware; can only be cleared (= 0) in software.

bit 5

SPIRBE: RX FIFO Empty bit (valid only when ENHBUF = 1)

1 = RX FIFO is empty (CRPTR = SWPTR)

0 = RX FIFO is not empty (CRPTR ≠ SWPTR)

bit 4

Unimplemented: Read as ‘0’

DS61168C-page 170

Preliminary

© 2011 Microchip Technology Inc.

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