CS493102-CL データシートの表示（PDF） - Cirrus Logic

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CS493102-CL

Multi-Standard Audio Decoder Family

Cirrus Logic 

CS49300 Family DSP

physically reside at location 0x0000. The

limitations of a non-paged memory are easily seen,

and they can be circumvented using paged

memory designs as discussed in the next section.

7.2. Paged Memory

Sometimes it is desirable for the external memory

to be paged by the host controller. One application

where this is useful is the autoboot mechanism

(discussed in Section 8.2, “Autoboot” on page 57).

Using paged memory allows multiple dsp firmware

applications to be stored in the same memory, with

one application code image residing in each 32

kilobyte page.

Paging of the external memory is handled entirely

by the host controller. The host controller should

directly control all address bits outside of the

memory space to be used by the DSP. As 32

kilobyte pages are desired to hold each application

code, the DSP would need 15 bits for the address

space. The system designer would connect the 15

address signals from the address latches while the

host would directly control all address signals

above 15 bits to page the memory accordingly.

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DS339F7

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