STU2N62K3(2018) データシートの表示（PDF） - STMicroelectronics
部品番号
コンポーネント説明
メーカー
STU2N62K3
(Rev.:2018)
(Rev.:2018)
STMicroelectronics
STU2N62K3 Datasheet PDF : 27 Pages
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STD2N62K3, STF2N62K3, STU2N62K3
Electrical characteristics
2
Electrical characteristics
(TCASE = 25 °C unless otherwise specified)
Table 4. On/off states
Symbol
Parameter
Test conditions
V(BR)DSS
Drain-source
breakdown voltage
ID = 1 mA, VGS = 0 V
IDSS
IGSS
Zero gate voltage drain
current
Gate body leakage
current
VGS = 0 V, VDS = 620 V
VGS = 0 V, VDS = 620 V, TC = 125 °C (1)
VDS = 0 V, VGS = ±20 V
VGS(th)
RDS(on)
Gate threshold voltage
Static drain-source on
resistance
VDS = VGS, ID = 50 µA
VGS = 10 V, ID = 1.1 A
1. Defined by design, not subject to production test.
Min. Typ. Max. Unit
620
V
1
µA
50
µA
±10
µA
3
3.75
4.5
V
2.9
3.6
Ω
Table 5. Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
Ciss
Input capacitance
340
Coss
Crss
Output capacitance
Reverse transfer
capacitance
VDS = 50 V, f = 1 MHz, VGS = 0 V
-
26
-
pF
4
Co(tr) (1)
Equivalent capacitance
time related
VDS = 0 to 496 V, VGS = 0 V
-
17
-
pF
RG
Intrinsic gate resistance f = 1 MHz open drain
-
5
-
Ω
Qg
Total gate charge
VDD = 496 V, ID = 2.2 A, VGS = 0 to 10 V
15
Qgs
Gate-source charge
(see Figure 17. Test circuit for gate charge
-
3
-
nC
Qgd
Gate-drain charge
behavior)
9
1. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Symbol
td(on)
tr
td(off)
tf
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Table 6. Switching times
Test conditions
Min. Typ. Max. Unit
VDD = 310 V, ID = 1.1 A,
8
RG = 4.7 Ω, VGS = 10 V
4.4
(see Figure 16. Test circuit for resistive load
-
21
-
ns
switching times and Figure 21. Switching
time waveform)
22
DS7248 - Rev 3
page 3/27
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