PIC16C925/926
11.3 Pixel Control
11.3.1 LCDD (PIXEL DATA) REGISTERS
The pixel registers contain bits which define the state of
each pixel. Each bit defines one unique pixel.
Table 11-4 shows the correlation of each bit in the
LCDD registers to the respective common and seg-
ment signals.
Any LCD pixel location not being used for display can
be used as general purpose RAM.
REGISTER 11-3: GENERIC LCDD REGISTER LAYOUT
R/W-x
SEGs
COMc
bit 7
R/W-x
SEGs
COMc
R/W-x
SEGs
COMc
R/W-x
SEGs
COMc
R/W-x
SEGs
COMc
R/W-x
SEGs
COMc
R/W-x
SEGs
COMc
R/W-x
SEGs
COMc
bit 0
bit 7-0
SEGsCOMc: Pixel Data bit for Segment S and Common C
1 = Pixel on (dark)
0 = Pixel off (clear)
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
DS39544A-page 92
Preliminary
2001 Microchip Technology Inc.