STPCE1EDBI 데이터 시트보기 (PDF) - STMicroelectronics
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STPCE1EDBI Datasheet PDF : 87 Pages
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ELECTRICAL SPECIFICATIONS
Table 4-4. 2.5V Power Consumptions (VCORE + VDD_x_PLL)
HCLK
(MHz)
66
100
66
66
CPUCLK
(MHz)
66 (x1)
100 (x1)
133 (x2)
133 (x2)
MCLK
(MHz)
66
100
66
100
Mode
SYNC
ASYNC
PMU
(State)
Stop Clock
Full Speed
Stop Clock
Full Speed
Stop Clock
Full Speed
Stop Clock
Full Speed
PMax (W)
V2.5V=2.45V
V2.5V=2.7V
0.7
0.9
0.9
1.2
1.1
1.4
1.4
1.9
0.8
1.1
1.3
1.7
1.0
1.4
1.5
2.0
Note 1: PCI clock at 33MHz
HCLK
(MHz)
66
100
66
66
Table 4-5. 3.3V Power Consumptions (VDD)
CPUCLK
MCLK
PMU
(MHz)
66 (x1)
100 (x1)
133 (x2)
133 (x2)
(MHz)
66
100
66
100
(State)
Full Speed
PMax
(mW)
70
90
80
100
VDD_GPCLK_PLL
VDD_HCLKI_PLL
VDD_HCLKO_PLL
VDD_MCLKI_PLL
VDD_MCLKO_PLL
VDD_PCICLK_PLL
Table 4-6. PLL Power Consumptions
PLL name
PMax (mW)
VDD_PLL = 2.45V
VDD_PLL = 2.7V
5
10
5
10
5
10
5
10
5
10
5
10
Release 1.3 - January 29, 2002
35/87
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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