STPCE1EDBI 데이터 시트보기 (PDF) - STMicroelectronics
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STPCE1EDBI Datasheet PDF : 87 Pages
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ELECTRICAL SPECIFICATIONS
4.5.9 JTAG INTERFACE
Figure 4-12 and Table 4-15 list the AC
characteristics of the JTAG interface.
Figure 4-12. JTAG timing diagram
TRST
TCK
Treset
Tcycle
TMS,TDI
TDO
STPC.input
STPC.output
Tjset Tjhld
Tjout
Tpset Tphld
Tpout
Table 4-15. JTAG AC Timings
Name Parameter
Min
Treset TRST pulse width
1
Tcycle TCLK period
400
TCLK rising time
TCLK falling time
Tjset TMS setup time
200
Tjhld TMS hold time
200
Tjset TDI setup time
200
Tjhld TDI hold time
200
Tjout TCLK to TDO valid
Tpset STPC pin setup time
30
Tphld STPC pin hold time
30
Tpout TCLK to STPC pin valid
Max
Unit
Tcycle
ns
20
ns
20
ns
ns
ns
ns
ns
30
ns
ns
ns
30
ns
52/87
Release 1.3 - January 29, 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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