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CL-PS7500FE

System-on-a Chip for Internet Appliance

Cirrus Logic 

CL-PS7500FE

System-on-a-Chip for Internet Appliance

10.3.66 DMAST/DMARQ/DMAMSK (0x1F0,0x1F4,0x1F8) — DMA Interrupt Control

The following three registers each contain only one bit relating to the status of the interrupt generated from

the sound DMA state machine.

DMAST (0x1F0) -— Sound DMA Interrupt Status

76543210

XXXSXXXX

S

Write

Read

sound interrupt status

ignored

status

bits[7:5, 3:0] unused

bit[4]

0

1

inactive

active

DMARQ (0x1F4) — Sound Interrupt Request

76543210

XXXSXXXX

S

Write

Read

sound interrupt request

ignored

request, status AND’ed with mask

bits[7:5, 3:0] unused

bit[4]

0

1

inactive

active

DMAMSK (0x1F8) — Sound Interrupt Mask

76543210

XXXSXXXX

S

Write

Read

sound interrupt mask

bits[7:5, 3:0] unused

bit[4]

0

1

do not affect nIRQ

affect nIRQ

mask

bits[7:5, 3:0] unused

bit[4] read value written above

108

MEMORY AND I/O PROGRAMMERS’ MODEL

ADVANCE DATA BOOK v2.0

June 1997

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