PIC16F882-I/MLSQTP 데이터 시트보기 (PDF) - Microchip Technology

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PIC16F882-I/MLSQTP

28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers

Microchip Technology 

PIC16F882/883/884/886/887

3.6.1 RD<4:0>

Figure 3-19 shows the diagram for these pins. These

pins are configured to function as general purpose

I/O’s.

Note: RD<4:0> is available on PIC16F884/887

only.

FIGURE 3-19:

Data Bus

BLOCK DIAGRAM OF

RD<4:0>

WR

PORTD

DQ

CK Q

WR

TRISD

DQ

CK Q

VDD

I/O Pin

VSS

RD

TRISD

RD

PORTD

3.6.2

RD5/P1B(1)

Figure 3-20 shows the diagram for this pin. This pin is

configurable to function as one of the following:

• a general purpose I/O

• a PWM output

Note 1: RD5/P1B is available on PIC16F884/887

only. See RB2/AN8/P1B for this function

on PIC16F882/883/886.

3.6.3

RD6/P1C(1)

Figure 3-20 shows the diagram for this pin. This pin is

configurable to function as one of the following:

• a general purpose I/O

• a PWM output

Note 1: RD6/P1C is available on PIC16F884/887

only. See RB1/AN10/P1C/C12IN3- for

this function on PIC16F882/883/886.

3.6.4

RD7/P1D(1)

Figure 3-20 shows the diagram for this pin. This pin is

configurable to function as one of the following:

• a general purpose I/O

• a PWM output

Note 1: RD7/P1D is available on PIC16F884/887

only. See RB4/AN11/P1D for this function

on PIC16F882/883/886.

FIGURE 3-20:

BLOCK DIAGRAM OF

RD<7:5>

Data Bus

DQ

WR

PORTD

CK Q

PSTRCON

CCP1 01

10

DQ

WR

TRISD

CK Q

RD

TRISD

RD

PORTD

VDD

I/O Pin

VSS

TABLE 3-4: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Register

on Page

PORTD

RD7

RD6

RD5

RD4

RD3

RD2

RD1

RD0

59

PSTRCON

—

—

— STRSYNC STRD STRC STRB STRA

150

TRISD

TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0

59

Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by

PORTD.

DS41291G-page 60

 2006-2012 Microchip Technology Inc.

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