Z86M1720ASC 데이터 시트보기 (PDF) - Zilog

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Z86M1720ASC

PCMCIA Interface Solution

Zilog 

Z86017/Z16017 PCMCIA Interface Solution

Product Specification

56

EEPROM Register

Address: SELECT 13h

Name: Window 1 Range Address LSB

Type: Write/Read

Table 33. Window 1 Range Address LSB: Address 13h

Bit Placement Bit Name

Bits 7-0

Description

LSB range Address for Port 1

EEPROM Register

Address: SELECT 14h

Name: Window 2 Control Register

Type: Write/Read

Table 34. Window 2 Control Register: Address 14h

Bit Placement Bit Name

Bit 0

DIS_PAC2

Bit 1

EN_PAC2_MEM

Bit 2

EN_PAC2_16

Bit 3

READ_PROTECT

Description

When this bit is set to 1, it disables Port 2 address control

and decoder.

When this bit is set to 1, Memory Mode decoder is

enabled. When it is cleared, the I/O Mode decoder is

enabled.

When this bit is set, data swapping is provided internal to

the chip during data reads from the low byte of the ATA

bus to the PCMCIA bus high byte, and from the high byte

of the PCMCIA bus to the low byte of the ATA bus during

data writes. When this bit is cleared, it is high byte to high

byte and low byte to low byte.

Allows two cards at the same address to be read from.

When this bit is set, it prevents the PCMCIA bus from

becoming active.

PS012002-1201

Programming Internal Registers

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