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SST39LF100-70-4C-WI 데이터 시트보기 (PDF) - Silicon Storage Technology

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SST39LF100-70-4C-WI
SST
Silicon Storage Technology 
SST39LF100-70-4C-WI Datasheet PDF : 22 Pages
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PACKAGING DIAGRAMS
Pin # 1 Identifier
1 Mbit Multi-Purpose Flash
SST39LF100 / SST39VF100
Data Sheet
1.05
0.95
10.10
9.90
.50
BSC
.270
.170
12.50
12.30
0.15
0.05
0.60
0.40
14.20
13.80
40.TSOP-WI-ILL.4
Note: 1. Complies with JEDEC publication 95 MO-142 CA dimensions, although some dimensions may be more stringent.
2. All linear dimensions are in millimeters (min/max).
3. Coplanarity: 0.1 (±.05) mm.
4. Maximum allowable mold flash is 0.15mm at the package ends, and 0.25mm between leads.
40-LEAD THIN SMALL OUTLINE PACKAGE (TSOP) 10MM X 14MM
SST PACKAGE CODE: WI
©2001 Silicon Storage Technology, Inc.
20
S71129-02-000 6/01 363

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