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STM32F407OGT7 데이터 시트보기 (PDF) - STMicroelectronics

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STM32F407OGT7 Datasheet PDF : 185 Pages
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Electrical characteristics
STM32F405xx, STM32F407xx
1. Guaranteed by design, not tested in production.
Table 62. ULPI timing
Parameter
Symbol
Control in (ULPI_DIR) setup time
Control in (ULPI_NXT) setup time
tSC
Control in (ULPI_DIR, ULPI_NXT) hold time
tHC
Data in setup time
tSD
Data in hold time
tHD
Control out (ULPI_STP) setup time and hold time
tDC
Data out available from clock rising edge
tDD
1. VDD = 2.7 V to 3.6 V and TA = –40 to 85 °C.
Value(1)
Min.
Max.
Unit
-
2.0
-
1.5
0
-
-
2.0
ns
0
-
-
9.2
-
10.7
Figure 46. ULPI timing diagram
Clock
tSC
Control In
(ULPI_DIR,
ULPI_NXT)
tSD
data In
(8-bit)
Control out
(ULPI_STP)
data out
(8-bit)
tHC
tHD
tDC
tDD
tDC
ai17361c
Ethernet characteristics
Unless otherwise specified, the parameters given in Table 64, Table 65 and Table 66 for
SMI, RMII and MII are derived from tests performed under the ambient temperature, fHCLK
frequency summarized in Table 14 and VDD supply voltage conditions summarized in
Table 63, with the following configuration:
Output speed is set to OSPEEDRy[1:0] = 10
Capacitive load C = 30 pF
Measurement points are done at CMOS levels: 0.5VDD.
Refer to Section 5.3.16: I/O port characteristics for more details on the input/output
characteristics.
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DocID022152 Rev 4

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