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STM32F407RGH7 데이터 시트보기 (PDF) - STMicroelectronics

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STM32F407RGH7 Datasheet PDF : 185 Pages
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Electrical characteristics
STM32F405xx, STM32F407xx
Table 76. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings(1)(2)
th(A_NWE) Address hold time after FSMC_NWE high
THCLK– 2
-
ns
tv(BL_NE)
FSMC_NEx low to FSMC_BL valid
-
1.5
ns
th(BL_NWE) FSMC_BL hold time after FSMC_NWE high
THCLK– 1
-
ns
tv(Data_NE) Data to FSMC_NEx low to Data valid
-
THCLK+3 ns
th(Data_NWE) Data hold time after FSMC_NWE high
THCLK–1
-
ns
tv(NADV_NE) FSMC_NEx low to FSMC_NADV low
-
2
ns
tw(NADV)
FSMC_NADV low time
-
THCLK+0.5 ns
1. CL = 30 pF.
2. Based on characterization, not tested in production.
Figure 57. Asynchronous multiplexed PSRAM/NOR read waveforms
tw(NE)
FSMC_NE
tv(NOE_NE)
t h(NE_NOE)
FSMC_NOE
FSMC_NWE
FSMC_A[25:16]
FSMC_NBL[1:0]
FSMC_AD[15:0]
t w(NOE)
tv(A_NE)
tv(BL_NE)
Address
NBL
th(A_NOE)
th(BL_NOE)
t v(A_NE)
Address
t v(NADV_NE)
tw(NADV)
tsu(Data_NE)
tsu(Data_NOE)
Data
th(AD_NADV)
th(Data_NE)
th(Data_NOE)
FSMC_NADV
ai14892b
Table 77. Asynchronous multiplexed PSRAM/NOR read timings(1)(2)
Symbol
Parameter
Min
Max
tw(NE)
tv(NOE_NE)
tw(NOE)
th(NE_NOE)
tv(A_NE)
FSMC_NE low time
FSMC_NEx low to FSMC_NOE low
FSMC_NOE low time
FSMC_NOE high to FSMC_NE high hold time
FSMC_NEx low to FSMC_A valid
3THCLK–1
2THCLK–0.5
THCLK–1
0
-
3THCLK+1
2THCLK+0.5
THCLK+1
-
3
Unit
ns
ns
ns
ns
ns
140/185
DocID022152 Rev 4

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