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STM32F405VGT6 데이터 시트보기 (PDF) - STMicroelectronics

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STM32F405VGT6 Datasheet PDF : 185 Pages
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STM32F405xx, STM32F407xx
Electrical characteristics
Table 20. Typical and maximum current consumption in Run mode, code with data processing
running from Flash memory (ART accelerator enabled) or RAM (1)
Typ
Max(2)
Symbol
Parameter
Conditions
fHCLK
TA =
25 °C
TA =
TA = Unit
85 °C 105 °C
168 MHz
87
102
109
144 MHz
67
80
86
120 MHz
56
69
75
90 MHz
44
56
62
External clock(3), all
peripherals enabled(4)(5)
60 MHz
30 MHz
25 MHz
30
42
49
16
28
35
12
24
31
16 MHz(6)
9
20
28
8 MHz
5
17
24
4 MHz
3
15
22
IDD
Supply current in
Run mode
2 MHz
168 MHz
2
14
21
mA
40
54
61
144 MHz
31
43
50
120 MHz
26
38
45
90 MHz
20
32
39
External clock(3), all
peripherals disabled(4)(5)
60 MHz
30 MHz
25 MHz
14
26
33
8
20
27
6
18
25
16 MHz(6)
5
16
24
8 MHz
3
15
22
4 MHz
2
14
21
2 MHz
2
14
21
1. Code and data processing running from SRAM1 using boot pins.
2. Based on characterization, tested in production at VDD max and fHCLK max with peripherals enabled.
3. External clock is 4 MHz and PLL is on when fHCLK > 25 MHz.
4. When the ADC is ON (ADON bit set in the ADC_CR2 register), add an additional power consumption of 1.6 mA per ADC for
the analog part.
5. When analog peripheral blocks such as ADCs, DACs, HSE, LSE, HSI, or LSI are ON, an additional power consumption
should be considered.
6. In this case HCLK = system clock/2.
DocID022152 Rev 4
83/185

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