AT83C51RB2-3CSCM 데이터 시트보기 (PDF) - Atmel Corporation

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AT83C51RB2-3CSCM

80C51 High Performance ROM 8-bit Microcontroller

Atmel Corporation 

Table 12. CCON Register

CCON - PCA Counter Control Register (D8h)

7

6

5

4

3

CF

CR

-

CCF4

CCF3

2

CCF2

1

CCF1

0

CCF0

Bit

Number

7

Bit

Mnemonic Description

PCA Counter Overflow flag

CF

Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF in

CMOD is set. CF may be set by either hardware or software but can only be

cleared by software.

PCA Counter Run control bit

6

CR Must be cleared by software to turn the PCA counter off.

Set by software to turn the PCA counter on.

5

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

PCA Module 4 interrupt flag

4

CCF4 Must be cleared by software.

Set by hardware when a match or capture occurs.

PCA Module 3 interrupt flag

3

CCF3 Must be cleared by software.

Set by hardware when a match or capture occurs.

PCA Module 2 interrupt flag

2

CCF2 Must be cleared by software.

Set by hardware when a match or capture occurs.

PCA Module 1 interrupt flag

1

CCF1 Must be cleared by software.

Set by hardware when a match or capture occurs.

PCA Module 0 interrupt flag

0

CCF0 Must be cleared by software.

Set by hardware when a match or capture occurs.

Reset Value = 000X 0000b

Not bit addressable

The watchdog timer function is implemented in module 4 (see Figure 11).

The PCA interrupt system is shown in Figure 9.

26 AT80C51RD2/AT83C51Rx2

4113B–8051–03/05

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