Table 47. IEN1 Register
IEN1 - Interrupt Enable Register (B1h)
7
6
5
4
-
-
-
-
3
2
1
0
-
ESPI
-
KBD
Bit
Bit
Number Mnemonic Description
7
-
Reserved
6
-
Reserved
5
-
Reserved
4
-
Reserved
3
-
Reserved
SPI Interrupt Enable Bit
2
ESPI Cleared to disable SPI interrupt.
Set to enable SPI interrupt.
1
-
Reserved
Keyboard Interrupt Enable Bit
0
KBD Cleared to disable keyboard interrupt.
Set to enable keyboard interrupt.
Reset Value = XXXX X000b
Bit addressable
60 AT89C51RB2/RC2
4180E–8051–10/06