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CS4202-JQ 데이터 시트보기 (PDF) - Cirrus Logic

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CS4202-JQ Datasheet PDF : 68 Pages
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CS4202
PR Bit
PR0
PR1
PR2
PR3
PR4
PR5
PR6
ADCs
DACs
Mixer
Analog
Reference
AC
Link
Internal
Clock Off
Table 16. Powerdown PR Function Matrix for the CS4202
Headphone
Power State
IDVdd (mA)
[DVdd=3.3 V]
Full Power + SRCs
25.2
Full Power + S/PDIF1
30.0
Full Power + HP2
26.4
Full Power
26.4
ADCs off (PR0)
24.0
DACs off (PR1)
24.3
Audio off (PR2)
21.9
Vref off (PR3)
21.9
AC-Link off (PR4)
21.8
Internal Clocks off (PR5)
3.8
HP amp off (PR6)
26.3
Digital off (PR4+PR5)
10 µA
All off (PR3+PR4+PR5)
10 µA
RESET
0.8
IDVdd (mA)
[DVdd=5 V]
40.2
46.6
41.5
41.5
37.9
38.4
34.9
34.9
35.3
6.3
41.5
21 µA
21 µA
1.4
IAVdd1 (mA)
31.3
31.3
32.1
31.3
23.2
25.8
3.8
1.5
31.2
19.0
29.8
19.0
1.3
3.6
IAVdd2 (mA)
5.1
5.1
39.5
5.1
4.9
5.0
0 µA
0 µA
5.1
4.6
0 µA
4.6
0 µA
0 µA
Table 17. Power Consumption by Powerdown Mode for the CS4202
1 Assuming standard resistive load for transformer coupled coaxial S/PDIF output (Rload = 292 Ohm, DVdd
= 3.3 V) (Rload = 415 Ohm, DVdd = 5 V). General: IDVdd S/PDIF = IDVdd + DVdd/Rload/2
2 HP_OUT_L, HP_OUT_R driving 4 Vpp into 32 Ohm resistive load.
DS549PP1
47

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