CS4952 데이터 시트보기 (PDF) - Cirrus Logic
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CS4952 Datasheet PDF : 44 Pages
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CS4952/53
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Burst begins with positive half-cycle
Burst phase = reference phase = 1800 relative to B-Y
Burst begins with negative half-cycle
Burst phase = reference phase = 1800relative to B-Y
Figure 12. NTSC Video Non-Interlaced Progressive Scan Timing
Composite
Video
CCIR656 V[7:0]
DATA
Y Cr Y FF 00 00 XY 80 10 80 10
EAV Code
80 10 80 10 80 10
Ancilliary Data
80 10 80 10 FF 00 00 XY Cb Y Cr Cb Y Cr
SAV Code
Active Video
4 Clocks
268 Clocks (NTSC)
280 Clocks (PAL)
Horizontal Blanking
4 Clocks
1440 Clocks
Active Video
Figure 13. CCIR656 Input Mode Timing
DS223PP2
21
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