ML6554CU 데이터 시트보기 (PDF) - Micro Linear Corporation

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ML6554CU

3A Bus Termination Regulator

Micro Linear Corporation 

ML6554

BUS

DESCRIPTION

GTL+

Gunning

Transceiver

Bus Plus

SSTL_2

Series Stub

Terminated

Logic for 2V

RAMBUS

LV-TTL

RAMBUS

Signaling

Logic

Low Voltage

TTL Logic or

PECL or

3.3V VME

DRIVING VDDQ

VTT

VREF

METHOD

Open Drain 5v or 3.3V 1.5V±10% 1.0V±2%

Note 10 Note12

Note 11

Symmetric 2.5V±10% 0.5x(VDDQ) 2.5V

Drive, Series

±3%

Resistance

Open Drain None

2.5V

Specified

2.0V

Symmetric

Drive

3.3±10% VDDQ/2

3.3V

MICRO

LINEAR

SOUTIONS

ML6554CU;

Mode: VREF

Input = 1.5V,

VCC = 5V

ML6554CU

or ML6553CS;

Mode: VREF

Input = Floating

or Forced,

VCC = 3.3V

ML6553CS;

Mode: VREF

Input = Open,

VCC = VDDQ

ML6553CS;

Mode: VREF

Input = Open,

VCC = VDDQ

INDUSTRY

SYSTEM

COMPONENTS

300 to 500MHz

Processor;

PC Chipsets;

GTLP 16xxx

Buffers;

Fairchild,

Texas Instr.

SSTL SDRAM;

Hitachi,

Fujitsu,

NEC, Micro,

Mitsubishi

nDRAM,

RAMBUS,

Intel, Toshiba

Processors or

backplanes;

LV-TTL

SDRAM,

EDO RAM

Table 2. Termination Solutions Summary By Buss Type

12

NOVEMBER, 1999

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