JS28F320J3C-115 데이터 시트보기 (PDF) - Intel
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JS28F320J3C-115 Datasheet PDF : 72 Pages
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256-Mbit J3 (x8/x16)
Table 30. Primary Vendor-Specific Extended Query (Sheet 2 of 2)
Offset(1)
P = 31h
Length
Description
(Optional Flash Features and Commands)
Add.
Hex
Code
Value
Optional feature and command support (1=yes, 0=no)
36:
--0A
bits 9–31 are reserved; undefined bits are “0.” If bit 31 is
37:
--00
“1” then another 31 bit field of optional features follows at
38:
--00
the end of the bit-30 field.
39:
--00
(P+5)h
(P+6)h
(P+7)h
(P+8)h
bit 0 Chip erase supported
bit 1 Suspend erase supported
4 bit 2 Suspend program supported
bit 3 Legacy lock/unlock supported
bit 4 Queued erase supported
bit 0 = 0
bit 1 = 1
bit 2 = 1
bit 3 = 1(1)
bit 4 = 0
No
Yes
Yes
Yes(1)
No
bit 5 Instant Individual block locking supported
bit 5 = 0
No
bit 6 Protection bits supported
bit 6 = 1
Yes
bit 7 Page-mode read supported
bit 7 = 1
Yes
bit 8 Synchronous read supported
bit 8 = 0
No
(P+9)h
Supported functions after suspend: read Array, Status,
Query
1
Other supported operations are:
bits 1–7 reserved; undefined bits are “0”
3A:
--01
bit 0 Program supported after erase suspend
bit 0 = 1
Yes
Block status register mask
3B:
--01
(P+A)h
(P+B)h
2
bits 2–15 are Reserved; undefined bits are “0”
bit 0 Block Lock-Bit Status register active
3C:
--00
bit 0 = 1
Yes
bit 1 Block Lock-Down Bit Status active
bit 1 = 0
No
(P+C)h
VCC logic supply highest performance program/erase
1
voltage
bits 0–3 BCD value in 100 mV
bits 4–7 BCD value in volts
3D:
--33 3.3 V
(P+D)h
VPP optimum program/erase supply voltage
1
bits 0–3 BCD value in 100 mV
bits 4–7 HEX value in volts
3E:
--00 0.0 V
NOTE:
1. Future devices may not support the described “Legacy Lock/Unlock” function. Thus bit 3 would have a
value of “0.”
Datasheet
57
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