ST92250CV2QB 데이터 시트보기 (PDF) - STMicroelectronics

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ST92250CV2QB

8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E³ ™ (EMULATED EEPROM), CAN 2.0B AND J1850 BLPD

STMicroelectronics 

ST92F124/F150/F250 - RESET AND CLOCK CONTROL UNIT (RCCU)

7.5 CRYSTAL OSCILLATOR

The on-chip components for the crystal oscillator

are an inverting circuit, polarised at the trip point.

The inverter is built around an n-channel transis-

tor, loaded with a current source and polarised

through a feedback resistor.

The current source is tailored to obtain a pseudo

sinusoidal signal at OSCOUT and OSCIN, reduc-

ing the electromagnetic emission. The inverter

stage is followed by a matching inverter, which is

followed in turn by a schmitt-triggered buffer.

In HALT mode, set by means of the HALT instruc-

tion, in STOP mode, and under control of the XT-

STOP bit, the oscillator is disabled. The current

sources are switched off, reducing the power dis-

sipation. The internal clock, CLOCK1, is forced to

a high level.

To exit the HALT condition and restart the oscilla-

tor, an external RESET pulse is required, having a

a minimum duration of TSTUP (see Figure 70 and

Section 11 ELECTRICAL CHARACTERISTICS).

It should be noted that, if the Watchdog function is

enabled, a HALT instruction will not disable the os-

cillator. This to avoid stopping the Watchdog if a

HALT code is executed in error. When this occurs,

the CPU will be reset when the Watchdog times

out or when an external reset is applied.

Table 31. Maximum RS values

C1=C2

Freq.

33pF

5 MHz

80

4 MHz

120

3 MHz

220

22pF

130

200

370

Legend:

C1, C2: Maximum Total Capacitances on pins OSCIN and

OSCOUT (the value includes the external capacitance

tied to the pin plus the parasitic capacitance of the board

and of the device)

Note: The tables are relative to the fundamental quartz

crystal only (not ceramic resonator).

Figure 67. Internal Oscillator Schematic

VDD

ILOAD

RPOL

CLOCK1

OSCIN

Figure 66. Crystal Oscillator

CRYSTAL CLOCK

OSCOUT

ST9

OSCIN

OSCOUT

Rd*

C1

C2

*Rd can be inserted to reduce the drive level,

when using low drive crystals.

h i l di

tl

Figure 68. External Clock

EXTERNAL CLOCK

INPUT

CLOCK

OSCIN

ST9

OSCOUT

VR02116B

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