LTC2274I(RevB) 데이터 시트보기 (PDF) - Linear Technology
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LTC2274I Datasheet PDF : 40 Pages
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LTC2274
APPLICATIONS INFORMATION
High Speed CML Outputs
The CML outputs must be terminated for proper opera-
tion. The OVDD supply voltage and the termination voltage
determine the common mode output level of the CML
outputs. For proper operation of the CML driver, the output
common mode voltage should be greater than 1V.
The directly-coupled termination mode of Figure 19a is
recommended when the receiver termination voltage is
within the range of 1.2V to 3.3V. When the CML outputs
are directly-coupled to the 50Ω termination resistors, the
OVDD supply voltage serves as the receiver termination
voltage, and the output common mode voltage will be
approximately 200mV lower than OVDD.
The directly-coupled differential termination of Figure 19b
may be used in the absence of a receiver termination voltage
within the required range. In this case, the common mode
voltage is shifted down to approximately 400mV below
OVDD, requiring an OVDD in the range of 1.4V to 3.3V.
If the serial receiver’s common mode input requirements
are not compatible with the directly-coupled termination
modes, the DC balanced 8B/10B encoded data will permit
the addition of DC blocking capacitors as shown in Figure
19c. In this AC-coupled mode, the termination voltage is
determined by the receiver’s requirements. The coupling
capacitors should be selected appropriately for the intended
operating bit-rate, usually between 1nF to 10nF. In the AC-
coupled mode, the output common mode voltage will be
approximately 400mV below OVDD, so the OVDD supply
voltage should be in the range of 1.4V to 3.3V.
Grounding and Bypassing
The LTC2274 require a printed circuit board with a
clean unbroken ground plane; a multilayer board with an
internal ground plane is recommended. The pinout of the
LTC2274 has been optimized for a flowthrough layout so
that the interaction between inputs and digital outputs is
minimized. Layout for the printed circuit board should
ensure that digital and analog signal lines are separated as
much as possible. In particular, care should be taken not
to run any digital track alongside an analog signal track
or underneath the ADC.
High quality ceramic bypass capacitors should be used
at the VDD, VCM, and OVDD pins. Bypass capacitors must
be located as close to the pins as possible. The traces
connecting the pins and bypass capacitors must be kept
short and should be made as wide as possible.
The LTC2274 differential inputs should run parallel and
close to each other. The input traces should be as short
as possible to minimize capacitance and to minimize
noise pickup.
Heat Transfer
Most of the heat generated by the LTC2274 is transferred
from the die through the bottom-side exposed pad. For
good electrical and thermal performance, the exposed
pad must be soldered to a large grounded pad on the PC
board. It is critical that the exposed pad and all ground
pins are connected to a ground plane of sufficient area
with as many vias as possible.
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