S9S08QD4CSC 데이터 시트보기 (PDF) - Freescale Semiconductor

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S9S08QD4CSC

8-BIT HCS08 Microcontrollers

Freescale Semiconductor 

Chapter 6 Parallel Input/Output Control

6.4.2.3 Port A Drive Strength Select (PTADS)

An output pin can be selected to have high output drive strength by setting the corresponding bit in the

drive strength select register (PTADSn). When high drive is selected a pin is capable of sourcing and

sinking greater current. Even though every I/O pin can be selected as high drive, the user must ensure that

the total current source and sink limits for the chip are not exceeded. Drive strength selection is intended

to affect the DC behavior of I/O pins. However, the AC behavior is also affected. High drive allows a pin

to drive a greater load with the same switching speed as a low drive enabled pin into a smaller load.

Because of this the EMC emissions may be affected by enabling pins as high drive.

6.4.2.4 Port A Drive Strength Select (PTADS)

7

R

0

W

6

5

4

3

2

1

0

PTADS51

PTADS4

PTADS3

PTADS2

PTADS1

Reset:

0

0

0

0

0

0

0

1 PTADS5 has no effect on the input-only PTA5 pin.

Figure 6-6. Drive Strength Selection for Port A Register (PTADS)

0

PTADS0

0

Table 6-5. PTADS Register Field Descriptions

Field

Description

5:0

PTADS[5:0]

Output Drive Strength Selection for Port A Bits — Each of these control bits selects between low and high

output drive for the associated PTA pin. For port A pins that are configured as inputs, these bits have no effect.

0 Low output drive strength selected for port A bit n.

1 High output drive strength selected for port A bit n.

MC9S08QD4 Series MCU Data Sheet, Rev. 6

72

Freescale Semiconductor

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