PIC16CR620AT-20I/SS 데이터 시트보기 (PDF) - Microchip Technology

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PIC16CR620AT-20I/SS

EPROM-Based 8-Bit CMOS Microcontrollers

Microchip Technology 

PIC16C62X

4.2.2.4 PIE1 Register

This register contains the individual enable bit for the

comparator interrupt.

REGISTER 4-4: PIE1 REGISTER (ADDRESS 8CH)

U-0

R/W-0

U-0

U-0

U-0

U-0

U-0

U-0

—

CMIE

—

—

—

—

—

—

bit 7

bit 0

bit 7

bit 6

bit 5-0

Unimplemented: Read as '0'

CMIE: Comparator Interrupt Enable bit

1 = Enables the Comparator interrupt

0 = Disables the Comparator interrupt

Unimplemented: Read as '0'

Legend:

R = Readable bit

- n = Value at POR

W = Writable bit

’1’ = Bit is set

4.2.2.5 PIR1 Register

This register contains the individual flag bit for the

comparator interrupt.

Note:

Interrupt flag bits get set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit or the global

enable bit, GIE (INTCON<7>). User

software should ensure the appropriate

interrupt flag bits are clear prior to enabling

an interrupt.

REGISTER 4-5:

PIR1 REGISTER (ADDRESS 0CH)

U-0

R/W-0

U-0

U-0

—

CMIF

—

—

bit 7

U = Unimplemented bit, read as ‘0’

’0’ = Bit is cleared x = Bit is unknown

U-0

U-0

U-0

U-0

—

—

—

—

bit 0

bit 7

bit 6

bit 5-0

Unimplemented: Read as '0'

CMIF: Comparator Interrupt Flag bit

1 = Comparator input has changed

0 = Comparator input has not changed

Unimplemented: Read as '0'

Legend:

R = Readable bit

- n = Value at POR

W = Writable bit

’1’ = Bit is set

U = Unimplemented bit, read as ‘0’

’0’ = Bit is cleared x = Bit is unknown

 2003 Microchip Technology Inc.

DS30235J-page 21

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