PIC16C61T-10/SS 데이터 시트보기 (PDF) - Microchip Technology

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PIC16C61T-10/SS

8-Bit CMOS Microcontrollers

Microchip Technology 

Example 4-1 shows the calling of a subroutine in

page 1 of the program memory. This example assumes

that the PCLATH is saved and restored by the interrupt

service routine (if interrupts are used).

EXAMPLE 4-1:

ORG 0x500

BSF PCLATH,3

BCF PCLATH,4

CALL SUB1_P1

:

:

:

ORG 0x900

SUB1_P1:

:

:

RETURN

CALL OF A SUBROUTINE IN

PAGE 1 FROM PAGE 0

;Select page 1 (800h-FFFh)

;Only on >4K devices

;Call subroutine in

;page 1 (800h-FFFh)

;called subroutine

;page 1 (800h-FFFh)

;return to Call subroutine

;in page 0 (000h-7FFh)

PIC16C6X

4.5 Indirect Addressing, INDF and FSR

Registers

Applicable Devices

61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67

The INDF register is not a physical register. Address-

ing the INDF register will cause indirect addressing.

Indirect addressing is possible by using the INDF reg-

ister. Any instruction using the INDF register actually

accesses the register pointed to by the File Select Reg-

ister, FSR. Reading the INDF register itself indirectly

(FSR = '0') will produce 00h. Writing to the INDF regis-

ter indirectly results in a no-operation (although status

bits may be affected). An effective 9-bit address is

obtained by concatenating the 8-bit FSR register and

the IRP bit (STATUS<7>), as shown in Figure 4-25.

A simple program to clear RAM location 20h-2Fh using

indirect addressing is shown in Example 4-2.

EXAMPLE 4-2: INDIRECT ADDRESSING

NEXT

CONTINUE

movlw

movwf

clrf

incf

btfss

goto

:

0x20

FSR

INDF

FSR,F

FSR,4

NEXT

;initialize pointer

; to RAM

;clear INDF register

;inc pointer

;all done?

;NO, clear next

;YES, continue

FIGURE 4-25: DIRECT/INDIRECT ADDRESSING

Direct Addressing

RP1: RP0 6

from opcode

0

Indirect Addressing

IRP 7

FSR

0

bank select location select

00

00h

01

80h

10

100h

bank select

11

180h

location select

Data

Memory

7Fh

FFh

17Fh

1FFh

Bank 0 Bank 1 Bank 2 Bank 3

For memory map detail see Figure 4-5, Figure 4-6, Figure 4-7, and Figure 4-8.

© 1997 Microchip Technology Inc.

DS30234D-page 49

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