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PIC16F688-E/SL 데이터 시트보기 (PDF) - Microchip Technology

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PIC16F688-E/SL Datasheet PDF : 202 Pages
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PIC16F688
4.2.5.2 RA1/AN1/C1IN-/VREF/ICSPCLK
Figure 4-2 shows the diagram for this pin. The RA1 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D
• an analog input to the comparator
• a voltage reference input for the A/D
• In-Circuit Serial Programming™ clock
FIGURE 4-2:
BLOCK DIAGRAM OF RA1
Data Bus
DQ
WR
WPUA
CK Q
RD
WPUA
Analog(1)
Input Mode
RAPU
VDD
Weak
DQ
WR
PORTA
CK Q
WR
TRISA
DQ
CK Q
RD
TRISA
VDD
I/O pin
VSS
Analog(1)
Input Mode
RD
PORTA
DQ
WR
IOCA
CK Q
RD
IOCA
QD
EN
Q3
QD
EN
Interrupt-on-
change
RD PORTA
To Comparator
To A/D Converter
Note 1: Comparator mode and ANSEL determines analog
Input mode.
4.2.5.3 RA2/AN2/T0CKI/INT/C1OUT
Figure 4-3 shows the diagram for this pin. The RA2 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D
• the clock input for Timer0
• an external edge triggered interrupt
• a digital output from the comparator
FIGURE 4-3:
Data Bus
DQ
WR
WPUA
CK Q
RD
WPUA
WR
PORTA
DQ
CK Q
WR
TRISA
DQ
CK Q
RD
TRISA
BLOCK DIAGRAM OF RA2
Analog(1)
Input Mode
VDD
Weak
RAPU
C1OUT
Enable
VDD
C1OUT 1
0
I/O pin
VSS
Analog(1)
Input Mode
RD
PORTA
DQ
WR
IOCA
CK Q
RD
IOCA
Interrupt-on-
change
QD
EN
Q3
QD
EN
RD PORTA
To Timer0
To INT
To A/D Converter
Note 1: Analog Input mode is based upon ANSEL.
DS41203C-page 38
© 2007 Microchip Technology Inc.

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