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PIC16F753-I/SLQTP 데이터 시트보기 (PDF) - Microchip Technology

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PIC16F753-I/SLQTP
Microchip
Microchip Technology 
PIC16F753-I/SLQTP Datasheet PDF : 238 Pages
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PIC16F753/HV753
2.3.5 PIE2 REGISTER
The PIE2 register contains the Peripheral Interrupt
Enable bits, as shown in Register 2-5.
Note: Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.
REGISTER 2-5: PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 1
U-0
bit 7
U-0
R/W-0
R/W-0
U-0
R/W-0
U-0
C2IE
C1IE
COG1IE
R/W-0
CCP1IE
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0
C2IE: Comparator 2 Interrupt Enable bit
1 = Enables the Comparator 2 interrupt
0 = Disables the Comparator 2 interrupt
C1IE: Comparator 1 Interrupt Enable bit
1 = Enables the Comparator 1 interrupt
0 = Disables the Comparator 1 interrupt
Unimplemented: Read as ‘0
COG1IE: COG 1 Interrupt Flag bit
1 = COG1 interrupt enabled
0 = COG1 interrupt disabled
Unimplemented: Read as ‘0
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
2013 Microchip Technology Inc.
Preliminary
DS40001709A-page 21

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