PIC16C711-04SP 데이터 시트보기 (PDF) - Microchip Technology
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PIC16C711-04SP Datasheet PDF : 176 Pages
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PIC16C71X
Applicable Devices 710 71 711 715
FIGURE 15-3: CLKOUT AND I/O TIMING
Q4
Q1
Q2
OSC1
CLKOUT
I/O Pin
(input)
I/O Pin
(output)
old value
10
13
14
19
18
17
15
20, 21
Q3
11
12
16
new value
Note: Refer to Figure 15-1 for load conditions.
TABLE 15-3: CLKOUT AND I/O TIMING REQUIREMENTS
Parameter Sym
No.
Characteristic
Min
Typ†
Max
Units Conditions
10* TosH2ckL OSC1↑ to CLKOUT↓
—
15
30
ns
11* TosH2ckH OSC1↑ to CLKOUT↑
—
15
30
ns
12* TckR
CLKOUT rise time
—
5
15
ns
13* TckF
CLKOUT fall time
—
5
15
ns
14* TckL2ioV CLKOUT ↓ to Port out valid
—
— 0.5TCY + 20 ns
15* TioV2ckH Port in valid before CLKOUT ↑
0.25TCY + 25 —
—
ns
16* TckH2ioI Port in hold after CLKOUT ↑
0
—
—
ns
17* TosH2ioV OSC1↑ (Q1 cycle) to
Port out valid
—
— 80 - 100 ns
18* TosH2ioI OSC1↑ (Q2 cycle) to
PIC16C71
Port input invalid (I/O in PIC16LC71
hold time)
100
—
—
ns
200
—
—
ns
19* TioV2osH Port input valid to OSC1↑ (I/O in setup time)
0
—
—
ns
20* TioR
Port output rise time
PIC16C71
—
10
25
ns
PIC16LC71
—
—
60
ns
21* TioF
Port output fall time
PIC16C71
—
10
25
ns
PIC16LC71
—
—
60
ns
22††* Tinp
INT pin high or low time
20
—
—
ns
23††* Trbp
RB7:RB4 change INT high or low time
20
—
—
ns
* These parameters are characterized but not tested.
†Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance
only and are not tested.
†† These parameters are asynchronous events not related to any internal clock edges.
Note 1: Measurements are taken in RC Mode where CLKOUT output is 4 x TOSC.
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
Note 1
DS30272A-page 142
© 1997 Microchip Technology Inc.
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