PIC16(L)F1512/3
The I2C interface supports the following modes and
features:
• Master mode
• Slave mode
• Byte NACKing (Slave mode)
• Limited Multi-master support
• 7-bit and 10-bit addressing
• Start and Stop interrupts
• Interrupt masking
• Clock stretching
• Bus collision detection
• General call address matching
• Address masking
• Address Hold and Data Hold modes
• Selectable SDA hold times
Figure 20-2 is a block diagram of the I2C interface
module in Master mode. Figure 20-3 is a diagram of the
I2C interface module in Slave mode.
FIGURE 20-2:
MSSP BLOCK DIAGRAM (I2C™ MASTER MODE)
SDA
SCL
SDA in
Read
Internal
data bus
Write
SSPBUF
SSPSR
MSb
Shift
Clock
LSb
Start bit, Stop bit,
Acknowledge
Generate (SSPCON2)
[SSPM 3:0]
Baud Rate
Generator
(SSPADD)
SCL in
Bus Collision
Start bit detect,
Stop bit detect
Write collision detect
Clock arbitration
State counter for
end of XMIT/RCV
Address Match detect
Set/Reset: S, P, SSPSTAT, WCOL, SSPOV
Reset SEN, PEN (SSPCON2)
Set SSPIF, BCLIF
DS40001624C-page 176
2012-2014 Microchip Technology Inc.