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PIC16F627-04I/P 데이터 시트보기 (PDF) - Microchip Technology

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PIC16F627-04I/P
Microchip
Microchip Technology 
PIC16F627-04I/P Datasheet PDF : 170 Pages
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PIC16F62X
6.3 Timer0 Prescaler
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer. A prescaler assignment for the Timer0 module
means that there is no postscaler for the Watchdog
Timer, and vice-versa.
The PSA and PS2:PS0 bits (OPTION<3:0>) determine
the prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (e.g., CLRF 1,
MOVWF 1, BSF 1, x....etc.) will clear the pres-
caler. When assigned to WDT, a CLRWDT instruction
will clear the prescaler along with the Watchdog Timer.
The prescaler is not readable or writable.
FIGURE 6-1:
FOSC/4
BLOCK DIAGRAM OF THE TIMER0/WDT
Data Bus
T0CKI
Pin
T0SE
0
1
T0CS
1
0
PSA
SYNC
2
Cycles
8
TMR0 reg
Set Flag Bit T0IF
on Overflow
Watchdog
Timer
0
1
PSA
WDT Postscaler/
TMR0 Prescaler
8
8-to-1MUX
PS0 - PS2
WDT Enable bit
0
1
PSA
WDT
Timeout
Note 1: T0SE, T0CS, PSA, .PS0-PS2 are bits in the Option Register.
DS40300C-page 44
Preliminary
2003 Microchip Technology Inc.

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