PIC18LF1320-I/SOSQTP 데이터 시트보기 (PDF) - Microchip Technology

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PIC18LF1320-I/SOSQTP

18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

Microchip Technology 

18.2.1 REFERENCE VOLTAGE SET POINT

The internal reference voltage of the LVD module may

be used by other internal circuitry (the programmable

Brown-out Reset). If these circuits are disabled (lower

current consumption), the reference voltage circuit

requires a time to become stable before a low-voltage

condition can be reliably detected. This time is invariant

of system clock speed. This start-up time is specified in

electrical specification parameter 36. The low-voltage

interrupt flag will not be enabled until a stable reference

voltage is reached. Refer to the waveform in Figure 18-4.

18.2.2 CURRENT CONSUMPTION

When the module is enabled, the LVD comparator and

voltage divider are enabled and will consume static cur-

rent. The voltage divider can be tapped from multiple

places in the resistor array. Total current consumption,

when enabled, is specified in electrical specification

parameter D022B.

PIC18F1220/1320

18.3 Operation During Sleep

When enabled, the LVD circuitry continues to operate

during Sleep. If the device voltage crosses the trip

point, the LVDIF bit will be set and the device will wake-

up from Sleep. Device execution will continue from the

interrupt vector address if interrupts have been globally

enabled.

18.4 Effects of a Reset

A device Reset forces all registers to their Reset state.

This forces the LVD module to be turned off.

© 2007 Microchip Technology Inc.

DS39605F-page 169

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