PIC18F45J50-I/SOSQTP 데이터 시트보기 (PDF) - Microchip Technology

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PIC18F45J50-I/SOSQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

11.0 PARALLEL MASTER PORT

(PMP)

The Parallel Master Port module (PMP) is an 8-bit

parallel I/O module, specifically designed to communi-

cate with a wide variety of parallel devices, such as

communication peripherals, LCDs, external memory

devices and microcontrollers. Because the interface to

parallel peripherals varies significantly, the PMP is

highly configurable. The PMP module can be

configured to serve as either a PMP or as a Parallel

Slave Port (PSP).

FIGURE 11-1:

PMP MODULE OVERVIEW

PIC18

Parallel Master Port

PMA<0>

PMALL

PMA<1>

PMALH

PMA<7:2>

PMCS

Key features of the PMP module are:

• Up to 16 bits of Addressing when Using

Data/Address Multiplexing

• Up to 8 Programmable Address Lines

• One Chip Select Line

• Programmable Strobe Options:

- Individual Read and Write Strobes or;

- Read/Write Strobe with Enable Strobe

• Address Auto-Increment/Auto-Decrement

• Programmable Address/Data Multiplexing

• Programmable Polarity on Control Signals

• Legacy Parallel Slave Port Support

• Enhanced Parallel Slave Support:

- Address Support

- 4-Byte Deep, Auto-Incrementing Buffer

• Programmable Wait States

• Selectable Input Voltage Levels

Address Bus

Data Bus

Control Lines

Up to 8-Bit Address

EEPROM

PMBE

PMRD

PMRD/PMWR

PMWR

PMENB

PMD<7:0>

PMA<7:0>

PMA<15:8>

Microcontroller

LCD

8-Bit Data

FIFO

Buffer

 2011 Microchip Technology Inc.

DS39931D-page 169

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