PIC18F44J50-I/SPSQTP 데이터 시트보기 (PDF) - Microchip Technology

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PIC18F44J50-I/SPSQTP

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

REGISTER 26-3: CTMUICON: CTMU CURRENT CONTROL REGISTER (ACCESS FB1h)

R/W-0

ITRIM5

bit 7

R/W-0

ITRIM4

R/W-0

ITRIM3

R/W-0

ITRIM2

R/W-0

ITRIM1

R/W-0

ITRIM0

R/W-0

IRNG1

R/W-0

IRNG0

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 7-2

bit 1-0

ITRIM<5:0>: Current Source Trim bits

011111 = Maximum positive change from nominal current

011110

.

.

.

000001 = Minimum positive change from nominal current

000000 = Nominal current output specified by IRNG<1:0>

111111 = Minimum negative change from nominal current

.

.

.

100010

100001 = Maximum negative change from nominal current

IRNG<1:0>: Current Source Range Select bits

11 = 100  Base current

10 = 10  Base current

01 = Base current level (0.55 A nominal)

00 = Current source disabled

TABLE 26-1: REGISTERS ASSOCIATED WITH CTMU MODULE

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset

Values

on Page:

CTMUCONH CTMUEN

—

CTMUSIDL TGEN

EDGEN EDGSEQEN IDISSEN

r

71

CTMUCONL EDG2POL EDG2SEL1 EDG2SEL0 EDG1POL EDG1SEL1 EDG1SEL0 EDG2STAT EDG1STAT 71

CTMUICON ITRIM5

ITRIM4

ITRIM3

ITRIM2

ITRIM1

ITRIM0

IRNG1

IRNG0

71

Legend: — = unimplemented, read as ‘0’, r = reserved bit. Shaded cells are not used during ECCP operation.

 2011 Microchip Technology Inc.

DS39931D-page 415

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