PSD805G3-15UI 데이터 시트보기 (PDF) - STMicroelectronics

부품명

상세내역

제조사

PSD805G3-15UI

Configurable Memory System on a Chip for 8-Bit Microcontrollers

STMicroelectronics 

PSD8XX Family

The

PSD835G2

Functional

Blocks

(cont.)

PSD835G2

9.4.4 Port Data Registers

The Port Data Registers, shown in Table 24, are used by the microcontroller to write data

to or read data from the ports. Table 24 shows the register name, the ports having each

register type, and microcontroller access for each register type. The registers are

described below.

9.4.4.1 Data In

Port pins are connected directly to the Data In buffer. In MCU I/O input mode, the pin input

is read through the Data In buffer.

9.4.4.2 Data Out Register

Stores output data written by the MCU in the MCU I/O output mode. The contents of the

Register are driven out to the pins if the Direction Register or the output enable

product term is set to “1”. The contents of the register can also be read back by the

microcontroller.

9.4.4.3 Output Micro⇔Cells (OMCs)

The CPLD OMCs occupy a location in the microcontroller’s address space. The

microcontroller can read the output of the OMCs. If the Mask Micro⇔Cell Register bits are

not set, writing to the Micro⇔Cell loads data to the Micro⇔Cell flip flops. Refer to the PLD

section for more details.

9.4.4.4 Mask Micro⇔Cell Register

Each Mask Register bit corresponds to an OMC flip flop. When the Mask Register bit

is set to a “1”, loading data into the OMC flip flop is blocked. The default value is “0” or

unblocked.

9.4.4.5 Input Micro⇔Cells (IMCs)

The IMCs can be used to latch or store external inputs. The outputs of the IMCs

are routed to the PLD input bus, and can be read by the microcontroller. Refer to the PLD

section for a detailed description.

9.4.4.6 Enable Out

The Enable Out register can be read by the microcontroller. It contains the output enable

values for a given port. A “1” indicates the driver is in output mode. A “0” indicates the

driver is in tri-state and the pin is in input mode.

Table 24. Port Data Registers

Register Name

Port

MCU Access

Data In

A,B,C,D,E,F,G Read – input on pin

Data Out

A,B,C,D,E,F,G Write/Read

Output Micro⇔Cell A,B

Mask Micro⇔Cell A,B

Input Micro⇔Cell

Enable Out

A,B,C

A,B,C,F

Read – outputs of Micro⇔Cells

Write – loading Micro⇔Cells Flip-Flop

Write/Read – prevents loading into a given

Micro⇔Cell

Read – outputs of the Input Micro⇔Cells

Read – the output enable control of the port driver

60

Share Link: