ST7MC2N6 데이터 시트보기 (PDF) - STMicroelectronics

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ST7MC2N6

8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCI™

STMicroelectronics 

ST7MC1xx/ST7MC2xx

MOTOR CONTROLLER (Cont’d)

A logic block manages capture operations de-

pending on the sensor type. A capture is initiated

on an active edge (“Tacho capture” event) when

using a tachogenerator.

If an encoder is used, the capture is triggered on

two events depending on the Encoder Capture

Mode bit (ECM) in the MZFR register:

– Reading the MSB of the counter in manual

mode (ECM = 1)

– Interrupt from the Real-time Clock in automat-

ic mode (ECM = 0)

The clock source of the counter is selected de-

pending on sensor type:

– Motor Control Peripheral clock (16 MHz) with

tachogenerator or Hall sensors

– Encoder Clock

In order to optimize the accuracy of the measure-

ment for a wide speed range, the auto-updated pr-

escaler functionality is used with slight modifica-

tions compared to Sensor/Sensorless Modes (re-

fer to Figure 103 and Table 38).

– When the [MTIM:MTIML] timer value reaches

FFFFh, the prescaler is automatically increment-

ed in order to slow down the counter and avoid

an overflow. To keep consistent values, the

MTIM and MTIML registers are shifted right (di-

vided by two). The RPI bit in the MISR register is

set and an interrupt is generated (if RIM is set).

– When a capture event occurs, if the

[MTIM:MTIML] timer value is below 5500h, the

prescaler is automatically decremented in order

to speed up the counter and keep precision bet-

ter than 0.005% (1/5500h). The MTIM and

MTIML registers are shifted left (multiplied by

two). The RMI bit in the MISR register is set and

an interrupt is generated if RIM is set.

– If the prescaler contents reach the value 0, it can

no longer be automatically decremented, the

[MTIM:MTIML] timer continues working with the

same prescaler value, i.e. with a lower accuracy.

No RMI interrrupt can be generated.

– If the prescaler contents reach the value 15, it

can no longer be automatically incremented.

When the timer reaches the value FFFFh, the pr-

escaler and all the relevant registers remain un-

changed and no interrupt is generated, the timer

clock is disabled, and its contents stay at FFFFh.

The capture logic block still works, enabling the

capture of the maximum timer value.

The only automatically updated registers for the

Speed Sensor Mode are MTIM and MTIML. Ac-

cess to Delay manager registers in Speed Sensor

Mode is summarised in Table 41.

Figure 103. Auto-updated prescaler functional diagram

[MTIM:MTIML] Timer Overflow

(MTIM = MTIML = FFh)

Capture with [MTIM:MTIML] Timer < 5500h

(MZREG < 55h)

Begin

Begin

No

Ratio < Fh?

Yes

Ratio = Ratio + 1

Counter = Counter/2

End

Slow-down control

No

Ratio > 0?

Yes

Ratio = Ratio - 1

Counter = 0

End

Speed-up control

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