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ST7MC2N6T3 데이터 시트보기 (PDF) - STMicroelectronics

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ST7MC2N6T3 Datasheet PDF : 309 Pages
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ST7MC1xx/ST7MC2xx
CLOCK AND TIMING CHARACTERISTICS (Cont’d)
12.5.4 Clock Security System with PLL
Table 88. PLL Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
fOSC
PLL input frequency range
7
8
MHz
Output Frequency Output frequency when the PLL attain lock.
16
MHz
tLock
Jitter
PLL Lock Time (LOCKED = 1)
Jitter in the output clock
CPU clock frequency when VCO is con-
50
100
μs
2
%
fCPU
nected to ground (ICD internal clock or
back up oscillator )
3
MHz
Table 89. Clock Detector Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
fDetect
tsetup
Detected Minimum Input Frequency
Time needed to detect OSCIN once CKD is
enabled
500 1)
KHz
3
μs
thold
Time needed to detect that OSCIN stops
3
μs
Notes:
1. Data based on characterization results, not tested in production.
258/309

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