Signature Bytes
To preserve the secrecy of the encryption key byte sequence, the Encryption Array can
not be verified.
Notes:
1. When a MOVC instruction is executed, the content of the ROM is not encrypted. In
order to fully protect the user program code, the lock bit level 1 (see Table 33) must
always be set when encryption is used.
2. If the encryption feature is implemented, the portion of the on-chip code memory that
does not contain program code should be filled with “random” byte values to prevent
the encryption key sequence from being revealed.
The TSC80251G2D derivatives contain factory-programmed Signature Bytes. These
bytes are located in non-volatile memory outside the memory address space at 30h,
31h, 60h and 61h. To read the Signature Bytes, perform the procedure described in sec-
tion Verify Algorithm, using the verify signature mode (see Table 37). Signature byte
values are listed in Table 35.
Table 35. Signature Bytes (Electronic ID)
Vendor
Architecture
Memory
Revision
Atmel
C251
32 kilobytes EPROM or
OTPROM
32 kilobytes MaskROM
or ROMless
TSC80251G2D
derivative
Signature Address
30h
31h
60h
61h
Signature Data
58h
40h
F7h
77h
FDh
Programming Algorithm
Figure 6 shows the hardware setup needed to program the TSC87251G2D
EPROM/OTPROM areas:
• The chip has to be put under reset and maintained in this state until completion of
the programming sequence.
• PSEN# and the other control signals (ALE and Port 0) have to be set to a high level.
• Then PSEN# has to be to forced to a low level after two clock cycles or more and it
has to be maintained in this state until the completion of the programming sequence
(see below).
• The voltage on the EA# pin must be set to VDD.
• The programming mode is selected according to the code applied on Port 0 (see
Table 36). It has to be applied until the completion of this programming operation.
• The programming address is applied on Ports 1 and 3 which are respectively the
Most Significant Byte (MSB) and the Least Significant Byte (LSB) of the address.
• The programming data are applied on Port 2.
• The EPROM Programming is done by raising the voltage on the EA# pin to VPP,
then by generating a low level pulse on ALE/PROG# pin.
• The voltage on the EA# pin must be lowered to VDD before completing the
programming operation.
• It is possible to alternate programming and verifying operation (See Paragraph
Verify Algorithm). Please make sure the voltage on the EA# pin has actually been
lowered to VDD before performing the verifying operation.
42 AT/TSC8x251G2D
4135F–8051–11/06