Z84C90 데이터 시트보기 (PDF) - Zilog

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Z84C90

Z84C90 KIO Serial/Parallel Counter/Timer

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Z84C90 KIO Serial/Parallel Counter/Timer

Product Specification

14

Table 2. KIO Registers (Continued)

Address

A3 A2 A1 A0

Register 5: CTC Channel 1

0

1

0

1

Register 6: CTC Channel 2

0

1

1

0

Register 7: CTC Channel 3

0

1

1

1

Register 8: SIO Port A Data

1

0

0

0

Register 9: SIO Port A Command/Status

1

0

0

1

Register 10: SIO Channel B Data

1

0

1

0

Register 11: SIO Channel B Command/Status

1

0

1

1

Register 12: PIA Port C Data

1

1

0

0

Register 13: PIA Port C Command

1

1

0

1

Register 14: KIO Command

1

1

1

0

Register 15: KIO Command B

1

1

1

1

Note: Additionally, IORQ and CS must be Low. Registers are written to or read from by the

CPU, applying a 1 or a 0 respectively on the RD pin.

PS011804-0612

Register Address Decoding for the KIO

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