PIC16F636T-I/SL(2005) 데이터 시트보기 (PDF) - Microchip Technology

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PIC16F636T-I/SL
(Rev.:2005)

8/14-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology

Microchip Technology 

PIC12F635/PIC16F636/639

15.12 SPI Timing: Analog Front-End (AFE) for PIC16F639

AC CHARACTERISTICS

Standard Operating Conditions (unless otherwise stated)

Supply Voltage

2.0V ≤ VDD ≤ 3.6V

Operating temperature

-40°C ≤ TAMB ≤ +85°C for industrial

-40°C ≤ TAMB ≤ +125°C for extended

LC Signal Input

Sinusoidal 300 mVPP

Carrier Frequency

125 kHz

LCCOM connected to VSS

Param Sym

Characteristic

Min Typ† Max Units

Conditions

FSCLK

Tcssc

SCLK Frequency

CS fall to first SCLK edge

setup time

—

—

100

—

3

MHz

—

ns

TSU SDI setup time

THD SDI hold time

30

—

—

ns

50

—

—

ns

THI SCLK high time

TLO SCLK low time

150

—

—

ns

150

—

—

ns

TDO SDO setup time

—

—

150

ns

TSCCS SCLK last edge to CS rise

100

—

—

ns

setup time

TCSH CS high time

500

—

—

ns

TCS1 CS rise to SCLK edge setup

50

—

—

ns

time

TCS0

TSPIR

TSPIF

SCLK edge to CS fall setup

time

Rise time of SPI data

(SPI Read command)

Fall time of SPI data

(SPI Read command)

50

—

—

—

10

—

—

10

—

ns SCLK edge when CS is high

ns VDD = 3.0V. Time is measured from 10%

to 90% of amplitude

ns VDD = 3.0V. Time is measured from 90%

to 10% of amplitude

*

†

Note 1:

2:

Parameter is characterized but not tested.

Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are

not tested.

Required output enable filter high time must account for input path analog delays = TOEH - TDR + TDF

Required output enable filter low time must account for input path analog delays (= TOEL + TDR - TDF)

© 2005 Microchip Technology Inc.

Preliminary

DS41232B-page 171

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