STAP16DPPS05
Error detection mode functionality
7.3
Phase three: resuming normal mode
The sequence for re-entering normal mode is shown in the following table:
Table 14: Resuming normal mode - timing diagram
CLK
1°
2°
3°
4°
5°
OE/DM2
H
L
H
H
H
LE/DM1
L
L
L
L
L
7.4
For proper device operation, the “entering error detection” sequence must be
followed by a “resume mode” sequence, it is not possible to insert consecutive
equal sequences.
Error detection conditions
Table 15: Detection conditions (VDD = 3.3 to 5 V, temperature range -40 to 125 °C)
Configuration
Detect mode
Detection results
SW-1 or
SW-3b
SW-2 or
SW-3a
Open line or output short to
GND detected
==> IODEC ≤ 0.5 x IO
Short on LED or short to V-
LED detected
==> VO ≥ 2.6 V
No error
detected
==> IODEC ≥ 0.5 x IO
No error
detected
==> VO ≤ 2.3 V
Where: IO = the output current programmed by the REXT, IODEC = the detected
output current in detection mode.
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