AT91SAM7X128C-CU 데이터 시트보기 (PDF) - Atmel Corporation

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AT91SAM7X128C-CU

AT91SAM ARM-based Flash MCU

Atmel Corporation 

Revision History

Table 12-2.

Doc. Rev

6120AS

6120BS

Revision History

Comments

First issue - Unqualified on Intranet

Legal page updated.Qualified on Intranet

Corrections to maintain consistency with full datasheet:

In “Features” on page 1, corrected Page Programming Time and Full Erase Time; corrected number of

PDC channels, removed Wake-on-LAN support.

In Figure 2-1 on page 4, corrected number of PDC channels.

In Figure 2-1 on page 4, Table 3-1 on page 5, Table 10-2 on page 32 and Table 10-3 on page 33,

changed all SPI pin names.

In Section 5.2 “Power Consumption” on page 11, changed value of static current level and value of

dynamic power consumption level on VDDCORE

In Section 6.2 “Test Pin” on page 13, removed reference to SAM-BA boot recovery.

In Section 6.6 “I/O Lines Current Drawing” on page 14, changed value of total current level.

In Section 7.4 “Peripheral DMA Controller” on page 16, corrected number of PDC channels.

In Section 8. “Memories” on page 17, corrected Page Programming Time and Full Erase Time.

In Section 8.7 “SAM-BA Boot Assistant” on page 22, updated section.

In Figure 9-1 on page 24, changed range of periph_irq and periph_clk on AIC and for Embedded

Peripherals block.

In Section 10.6 “Ethernet MAC” on page 34, updated features.

Change

Request

Ref.

CSR 05-388

6120CS

6120DS

Update to product functionalities including changes to “Features” on page 1, Figure 2-1 on page 4,

Section 9.5 “Debug Unit” on page 28 and to Peripheral mapping.

Updated PLL output range max value in Section 9.2 “Clock Generator” on page 26.

Updated information in Section 5.1 “Power Supplies” on page 11.

Updated ordering information in “Ordering Information” on page 41.

Added AT91SAM7X512 to product family.“Features” on page 1 and global

Reformatted Memories Section 8. “Memories” on page 17.

Reordered sub sections in Peripherals Section 10. “Peripherals” on page 30

Consolidated Memory Mapping in Figure 8-1 on page 18.

Added TFBGA information Section 4.3 “100-ball TFBGA Package Outline” on page 10.

added LQFP and TFBGA package drawings Section 11. on page 38.

05-457

05-462

05-491

05-471

2723

2728

System Controller block diagram Figure 9-1 on page 24, “ice_nreset” signals changed to

“power_on_reset”.

Section 10.1 ”User Interface” User Peripherals are mapped between 0xF000 0000 and 0XFFFF EFFF.

Table 10-1 on page 30 SYSIRQ changed to SYSC in “Peripheral Identifiers”

rfo review

42 SAM7X512/256/128 Summary

6120GS–ATARM–07-Apr-11

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