STM8AF526x/8x/Ax STM8AF6269/8x/Ax
Option bytes
Table 19. Option byte description (continued)
Option byte no.
Description
LSI_EN: Low speed internal clock enable
0: LSI clock is not available as CPU clock source
1: LSI clock is available as CPU clock source
OPT3
IWDG_HW: Independent watchdog
0: IWDG Independent watchdog activated by software
1: IWDG Independent watchdog activated by hardware
WWDG_HW: Window watchdog activation
0: WWDG window watchdog activated by software
1: WWDG window watchdog activated by hardware
WWDG_HALT: Window watchdog reset on Halt
0: No reset generated on Halt if WWDG active
1: Reset generated on Halt if WWDG active
EXTCLK: External clock selection
0: External crystal connected to OSCIN/OSCOUT
1: External clock signal on OSCIN
OPT4
CKAWUSEL: Auto-wakeup unit/clock
0: LSI clock source selected for AWU
1: HSE clock with prescaler selected as clock source for AWU
PRSC[1:0]: AWU clock prescaler
00: 24 MHz to 128 kHz prescaler
01: 16 MHz to 128 kHz prescaler
10: 8 MHz to 128 kHz prescaler
11: 4 MHz to 128 kHz prescaler
OPT5
HSECNT[7:0]: HSE crystal oscillator stabilization time
This configures the stabilization time to 0.5, 8, 128, and 2048 HSE cycles
with corresponding option byte values of 0xE1, 0xD2, 0xB4, and 0x00.
OPT6
TMU[3:0]: Enable temporary memory unprotection
0101: TMU disabled (permanent ROP).
Any other value: TMU enabled.
OPT7
WAIT STATE: Wait state configuration
This option configures the number of wait states inserted when reading
from the Flash/data EEPROM memory.
0: No wait state
1: One wait state
OPT8
TMU_KEY 1 [7:0]: Temporary unprotection key 0
Temporary unprotection key: Must be different from 0x00 or 0xFF
OPT9
TMU_KEY 2 [7:0]: Temporary unprotection key 1
Temporary unprotection key: Must be different from 0x00 or 0xFF
OPT10
TMU_KEY 3 [7:0]: Temporary unprotection key 2
Temporary unprotection key: Must be different from 0x00 or 0xFF
OPT11
TMU_KEY 4 [7:0]: Temporary unprotection key 3
Temporary unprotection key: Must be different from 0x00 or 0xFF
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