Electrical characteristics
STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
5.3.8
Table 25. Low-power mode wakeup timings (continued)
Symbol
Parameter
Typ
Unit
Wakeup from Stop mode (regulator in run mode)
3.6
tWUSTOP(1)
Wakeup from Stop mode (regulator in low-power mode)
5.4
µs
tWUSTDBY(1) Wakeup from Standby mode
50
µs
1. The wakeup times are measured from the wakeup event to the point at which the user application code
reads the first instruction.
PLL characteristics
The parameters given in Table 26 are derived from tests performed under the ambient
temperature and VDD supply voltage conditions summarized in Table 8.
Table 26. PLL characteristics
Symbol
Parameter
Min(1)
Value
Typ
Max(1)
Unit
fPLL_IN
PLL input clock(2)
PLL input clock duty cycle
1
8.0
24
MHz
40
60
%
fPLL_OUT
tLOCK
Jitter
PLL multiplier output clock
PLL lock time
Cycle-to-cycle jitter
16
24
MHz
200
µs
300
ps
1. Based on device characterization, not tested in production.
2. Take care of using the appropriate multiplier factors so as to have PLL input clock values compatible with
the range defined by fPLL_OUT.
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