STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
Electrical characteristics
Figure 29. SPI timing diagram - slave mode and CPHA = 0
NSS input
CPHA= 0
CPOL=0
CPHA= 0
CPOL=1
tSU(NSS)
tc(SCK)
tw(SCKH)
tw(SCKL)
ta(SO)
MISO
OUT P UT
MOSI
I NPUT
tsu(SI)
tv(SO)
MS B O UT
M SB IN
th(SI)
th(SO)
BI T6 OUT
B I T1 IN
th(NSS)
tr(SCK)
tf(SCK)
tdis(SO)
LSB OUT
LSB IN
Figure 30. SPI timing diagram - slave mode and CPHA = 1(1)
ai14134c
166LQSXW
W68166
&3+$
&32/
&3+$
&32/
WZ6&.+
WZ6&./
0,62
287387
026,
,1387
WD62
WVX6,
WF6&.
WY62
06%287
WK6,
06%,1
WK62
%,7287
%,7,1
1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD.
WK166
WU6&.
WI6&.
WGLV62
/6%287
/6%,1
DLE
DocID16455 Rev 9
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