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AT90PWM2B-16SU 데이터 시트보기 (PDF) - Atmel Corporation

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AT90PWM2B-16SU Datasheet PDF : 365 Pages
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AT90PWM2/3/2B/3B
Table 25-3. Lock Bit Protection Modes(1)(2).
BLB0 Mode BLB02 BLB01
1
1
1
No restrictions for SPM or LPM accessing the Application
section.
2
1
0
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and LPM
executing from the Boot Loader section is not allowed to read
3
0
0
from the Application section. If Interrupt Vectors are placed in
the Boot Loader section, interrupts are disabled while executing
from the Application section.
LPM executing from the Boot Loader section is not allowed to
4
0
1
read from the Application section. If Interrupt Vectors are placed
in the Boot Loader section, interrupts are disabled while
executing from the Application section.
BLB1 Mode BLB12 BLB11
1
1
1
No restrictions for SPM or LPM accessing the Boot Loader
section.
2
1
0
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and LPM
executing from the Application section is not allowed to read
3
0
0
from the Boot Loader section. If Interrupt Vectors are placed in
the Application section, interrupts are disabled while executing
from the Boot Loader section.
LPM executing from the Application section is not allowed to
4
0
1
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
Notes: 1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
4317K–AVR–03/2013
281

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