STM32F031G6T7(2015) 데이터 시트보기 (PDF) - STMicroelectronics
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STM32F031G6T7
(Rev.:2015)
(Rev.:2015)
STMicroelectronics
STM32F031G6T7 Datasheet PDF : 106 Pages
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STM32F031x4 STM32F031x6
Electrical characteristics
Table 56. IWDG min/max timeout period at 40 kHz (LSI)(1)
Prescaler divider PR[2:0] bits
Min timeout RL[11:0]=
0x000
Max timeout RL[11:0]=
0xFFF
Unit
/4
0
0.1
409.6
/8
1
0.2
/16
2
0.4
/32
3
0.8
/64
4
1.6
/128
5
3.2
/256
6 or 7
6.4
819.2
1638.4
3276.8
ms
6553.6
13107.2
26214.4
1. These timings are given for a 40 kHz clock but the microcontroller internal RC frequency can vary from 30
to 60 kHz. Moreover, given an exact RC oscillator frequency, the exact timings still depend on the phasing
of the APB interface clock versus the LSI clock so that there is always a full RC period of uncertainty.
Table 57. WWDG min/max timeout value at 48 MHz (PCLK)
Prescaler
WDGTB
Min timeout value
Max timeout value
Unit
1
0
0.0853
5.4613
2
1
4
2
0.1706
0.3413
10.9226
ms
21.8453
8
3
0.6826
43.6906
6.3.20
Communication interfaces
I2C interface characteristics
The I2C interface meets the timings requirements of the I2C-bus specification and user
manual rev. 03 for:
• Standard-mode (Sm): with a bit rate up to 100 kbit/s
• Fast-mode (Fm): with a bit rate up to 400 kbit/s
• Fast-mode Plus (Fm+): with a bit rate up to 1 Mbit/s.
The I2C timings requirements are guaranteed by design when the I2Cx peripheral is
properly configured (refer to Reference manual).
The SDA and SCL I/O requirements are met with the following restrictions: the SDA and
SCL I/O pins are not “true” open-drain. When configured as open-drain, the PMOS
connected between the I/O pin and VDDIOx is disabled, but is still present. Only FTf I/O pins
support Fm+ low level output current maximum requirement. Refer to Section 6.3.14: I/O
port characteristics for the I2C I/Os characteristics.
All I2C SDA and SCL I/Os embed an analog filter. Refer to the table below for the analog
filter characteristics:
DocID025743 Rev 4
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