Functional overview
STM32F302xx/STM32F303xx
3.13
Digital-to-analog converter (DAC)
Up to two 12-bit buffered DAC channels can be used to convert digital signals into analog
voltage signal outputs. The chosen design structure is composed of integrated resistor
strings and an amplifier in inverting configuration.
This digital interface supports the following features:
● Up to two DAC output channels on STM32F303xB/STM32F303xC devices
● 8-bit or 10-bit monotonic output
● Left or right data alignment in 12-bit mode
● Synchronized update capability on STM32F303xB/STM32F303xC devices
● Noise-wave generation
● Triangular-wave generation
● Dual DAC channel independent or simultaneous conversions on
STM32F303xB/STM32F303xC devices
● DMA capability (for each channel on STM32F303xB/STM32F303xC devices)
● External triggers for conversion
3.14
Operational amplifier (OPAMP)
The STM32F302xx/STM32F303xx embeds up to four operational amplifiers with external or
internal follower routing and PGA capability (or even amplifier and filter capability with
external components). When an operational amplifier is selected, an external ADC channel
is used to enable output measurement.
The operational amplifier features:
● 8.2 MHz bandwidth
● 0.5 mA output capability
● Rail-to-rail input/output
● In PGA mode, the gain can be programmed to be 2, 4, 8 or 16.
3.15
Fast comparators (COMP)
The STM32F302xx/STM32F303xx devices embed seven fast rail-to-rail comparators with
programmable reference voltage (internal or external), hysteresis and speed (low speed for
low power) and with selectable output polarity.
The reference voltage can be one of the following:
● External I/O
● DAC output pin
● Internal reference voltage or submultiple (1/4, 1/2, 3/4). Refer to Table 26: Embedded
internal reference voltage on page 60 for the value and precision of the internal
reference voltage.
All comparators can wake up from STOP mode, generate interrupts and breaks for the
timers and can be also combined per pair into a window comparator
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Doc ID 023353 Rev 5