ST72F324J6TCX 데이터 시트보기 (PDF) - STMicroelectronics

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ST72F324J6TCX

8-bit MCU for automotive, 3.8 to 5.5V operating range with 8 to 32 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI

STMicroelectronics 

On-chip peripherals

ST72324xx-Auto

Changing the conversion channel

The application can change channels during conversion. When software modifies the

CH[3:0] bits in the ADCCSR register, the current conversion is stopped, the EOC bit is

cleared, and the A/D converter starts converting the newly selected channel.

10.6.4

Note:

Low power modes

The A/D converter may be disabled by resetting the ADON bit. This feature allows reduced

power consumption when no conversion is needed.

.

Table 70. Effect of low power modes on ADC

Mode

) Wait

duct(s Halt

Description

No effect on A/D converter

A/D converter disabled.

After wake-up from Halt mode, the A/D converter requires a stabilization time tSTAB

(see Section 12: Electrical characteristics) before accurate conversions can be

performed.

te Pro 10.6.5

- Obsole 10.6.6

Interrupts

None.

ADC registers

ADC Control/Status Register (ADCCSR)

t(s) ADCCSR

uc 7

6

5

4

3

d EOC

SPEED ADON Reserved

Pro RO

R/W

RW

-

Reset value: 0000 0000 (00h)

2

1

0

CH[3:0]

RW

leteTable 71. ADCCSR register description

so Bit Name

Ob End of Conversion

Function

7 EOC

This bit is set by hardware. It is cleared by hardware when software reads the

ADCDRH register or writes to any bit of the ADCCSR register.

0: Conversion is not complete

1: Conversion complete

ADC clock selection

6 SPEED

This bit is set and cleared by software.

0: fADC = fCPU/4

1: fADC = fCPU/2

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Doc ID 13841 Rev 1

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