ST72F324J2TCRE 데이터 시트보기 (PDF) - STMicroelectronics

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ST72F324J2TCRE

8-bit MCU for automotive, 3.8 to 5.5V operating range with 8 to 32 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI

STMicroelectronics 

ST72324xx-Auto

I/O ports

Figure 28. I/O port general block diagram

Register

access

Alternate

output

1

0

Alternate

enable

DR

VDD

P-buffer

(see table 24 below)

Pull-up

(see table 24 below)

VDD

DDR

Pull-up

condition

Pad

OR

) OR SEL

If implemented

uct(s DDR SEL

Prod DR SEL

1

te 0

ole External

s interrupt

b source (eix)

N-buffer

CMOS

Schmitt

trigger

Diodes

(see table 24 below)

Analog

input

Alternate

input

) - O Table 28. I/O port mode options

duct(s Configuration mode

Pull-up P-buffer

Diodes

to VDD

to VSS

roFloating with/without Interrupt

Input

PPull-up with/without Interrupt

te Push-pull

leOutput Open drain (logic level)

so True open drain

Off

Off

On

On

On

On

Off

Off

NI

NI

NI(1)

Ob 1. The diode to VDD is not implemented in the true open drain pads. A local protection between the pad and

VSS is implemented to protect the device against positive stress.

Legend:

NI = not implemented

Off = implemented not activated

On = implemented and activated

Doc ID 13841 Rev 1

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